Integrated circuits (ICs) have become more “dense” over time as device sizes continue to shrink. A modern IC having a die of a given size will generally include a greater number of devices than an older IC having a die of the same size due to smaller device size and increased device density. Increased device density, however, can lead to manufacturability issues that can reduce yield and/or reliability of the IC. This may be particularly true of single die ICs.
Multi-die ICs can provide benefits in terms of improved manufacturability. One type of multi-die IC, referred to as a “stacked die IC,” is formed by stacking multiple dies. When viewed against a comparable single die IC, a stacked die IC potentially allows for lower power consumption, less current leakage, greater performance, and/or smaller size among other benefits. Still, there are risks associated with the assembly of stacked die ICs that are not of concern for single die ICs. These risks also may reduce yield and/or reliability of stacked die ICs.